Thermal and Sensitivity Analysis of Multi-fin Devices

As device dimensions shrink into the nanometer range, power and performance constraints prohibit the longevity of traditional MOS devices in circuit design. A finFET, a quasi-planar double-gated device, has emerged as a replacement. FinFETs are formed by creating a silicon fin which protrudes out of the wafer, wrapping a gate around the fin, and then doping the ends of the fin to form the source and drain. Wider finFETs are formed using multiple fins between the source and drain regions. While finFETs provide promising electrostatic characteristics, they, like other ultra-thin body nano devices, have the potential to suffer from significant self heating. We study in this paper self heating in multi-fin devices. We first propose a distributed thermal channel model and validate it using ANSYS. We use this model to study the electro-thermal properties of multi-fin devices with both flared and rectangular channel extensions. We analyze variations in fin geometric parameters such as fin width, gate length, and fin and gate height, and we investigate the impact on thermal sensitivity. We utilize a thermal sensitivity metric, METS, to characterize device thermal robustness. We provide experimental data to validate our findings. Our work is novel as it is the first to address thermal issues within multi-fin devices. Furthermore, it provides an impetus for further research on the emerging area of electrothermal device and circuit design.